HP OmniBook 6100 Quanta RT2.0 ...

[ Pobierz całość w formacie PDF ]
A
B
C
D
E
MODEL:
RT2
RT2 MB
REV
DATE
CHANGE LIST
Page From
To
Page
From
To
C2 Test (PCB P/N: DA0RT2MBAD1)
1
1A
33
1A
31. To Decrease volume of PC Beep,
Page25: Change R319 to 22K, R312 to 680
Page26: Change R288 to 22K, R303 to 680
2
3
1A
34
1A
2A
32. Page47: For machenism interference, change C509, C510 to no-loading; C511,C512 to 270U.
33. Page14: For USB signals quality, change C415, C366, C391, C386, C429, C421 to no-loading.
34.Page15: Add 2'nd source for eeprom of Lan
35.Page8: Pull-up & pull-down already built in GMCH, so change R242, R38-40, R46-49, R52, R53, R60, R62-67, R72, R73 to no-loading.
1A 2A
35
1A
1A
1A
4
4
3B
2001/05/29
4
1A
2A
2A
2A
2A
36
2A
5
6
1A
37
36. Page42: Change spring to FDRT1010019(5mm): PAD100, PAD102, PAD106-108, 110-112.
38
1A
1A
2A
Ramp ( PCB P/N: DA0RT2MBAE0 )
1.Page12: For ICH3 (B0 stepping, QB62), change R547 to 18.2_1%.
2.Page42: Hole1, Hole2 are NPTH, so change pin1 to NC.
3.Page34: To awake EC, change D32.2 to <SUSB#> from <SUSA#>.
4.Page17: Add discharge circuits for CD_VCC: Q116, R676.
5.Page44: Change PC69, PC71 footprint to TC1206.
6.Page22: Change Q48 to 2N7002.
7.Page14: Change R20 to 0805 for USB GND.
7
1A
39
1A
2001/06/20
8
9
1A
40
1A
3C
41
1A
2A
2A
1A
1A
10
1A
42
11
12
1A
43
1A
2A
44
1A
2A
1A
2A
8.Page46: To avoid interference with Lan cable, move PFL2 to TOP side.
3
3
13
1A
45
1A
1A
9. For EMI,
Page27: Change C858, C860 to 180P.
Page42: Load PAD107, PAD29, PAD37. Change PAD110 to no-loading. Change PAD37 to FDSS2002019.
10.Page15: For lan, change R385 to 124_1%. Reserve C967,C757. Add 2'nd source for U59:ATP119(this config can pass the lan test in intel
lab). Change C968,C969 to 1000P_2KV_1206(footprint is compatible with 1808 size).
11. Change U47(ATI M6-P) P/N to AJAFA120T03 for TOP.
12.Page16: Change CON18(HDD conn) to DFHS44FR096.
13.Page12: Change RTC cap: C797, C796 to 15P.
14.Page36: To avoid mechanism interference, change CON15(stick conn) to 5.5mm(ACS).
15.Page30: To avoid conflict with wireless card, change R318.2 (USB_DISCONN) to CON24.4; R622.2 (USB_RESET) to CON24.6
16.Page22: Change C483 from 10U/25V_4532 to 10U/25V_1210.
17. For ESD,
Page42: Change Hole1 to <GND_DC1> and connected gnd by R678, R680. Change Hole2, PAD100 to <GND_DC2> and connected gnd by R677, R679.
Page41: Change CON5.243,244 to NC from GND.
14
1A
1A
2A
2A
2A
2A
46
2A
15
16
47
1A
2A
1A
48
1A
17
1A
49
1A
18
19
1A
1A
50
1A
51
1A
2A
20
1A
2A
21
1A
18. Change PCB to DA0RT2MBAE0, Rev E.
22
1A
2A
2A
2A
2A
2A
2
2
19.Page47: Change D5 footprint to DSMA.
20.Page8: Because of external graphic, pull down <DREF_CLK>: delete C963, change R666 to 10K.
21.Page26: Change R165 to 0603; add R681, but reserved.
22.Page41: U5,U6,U7 cghange foot print to APIC16861-RT2.
23
1A
2001/06/22
24
25
1A
1A
23.Page42: Change PAD37 to FDSS2002019 to avoid interference.
26
1A
1A
2001/06/28
24.Page8: Reserve R666.
27
25.Page45: Deeper sleep voltage change to 0.85V, so reserve R12,R170,R219; change R220, R169, R13 to loading.
2001/07/04
28
1A
29
1A
26. Add jumper wire(AWG26) to connect PQ43 pin3 and L124 pin2 on PCB top side, to avoid VGA core power <+1.8V_VGA> drop down.
2001/07/10
30
1A
1A
2A
2A
31
32
1A
1
1
Project : RT2 MB
MB Assy' P/N: 31RT2MBAB5
Document No.: 204
Rev: 3C
Cover Sheet: 6 of
6
PROJECT : RT2.0
Quanta Computer Inc.
Project Manager : Jacky Lee
Project Leader : T.S. Wan
Drawing by : Allan Yu
Approved by : Jacky Lee
A
B
C
D
E
 A
B
C
D
E
MODEL:
RT2
RT2 MB
REV
DATE
CHANGE LIST
Page From
To
Page
From
To
C2 Test (PCB P/N: DA0RT2MBAD1)
1
1A
33
1A
6. Page12: Move R600, C874, R609 close to ICH3.
7. Page28: To avoid floating, add pull-up R669 at <PCICSPK>.
8. Page47: For machenism interference, exchange the parts loaded on C510-512 with C81-83.
9. Page44: Change PQ47 from <1.8V_S5> to <+1.8V>.
2
3
1A
34
1A
2A
1A 2A
35
1A
1A
1A
4
4
2001/04/25
4
1A
2A
2A
2A
2A
36
2A
10. Page46: Reserved PAD101.
11. Page47: Delete R299. Change PU9.18 to GND. Delete <S0>, <S1>, R80, R81, R70, R68, R69, R77.
12. Page46: Add PC101 470P, PC102 1000P for EMI.
13. Page15: For LAN performance,
(1) Delete L101-L104, short directly.
(2) Delete <GND_LAN>, R407.
(3) C745, C730 change to GND.
(4) Change R376 to 0805.
(5) Add LAN termination plane <GND_LAN_TERM >. Add C967-C969 1000P.
(6) Change U59 to Pulse H0022.
5
6
1A
37
38
1A
1A
2A
7
1A
39
1A
2001/05/07
8
9
1A
40
1A
41
1A
2A
2A
1A
1A
10
1A
42
14. Page44: Delete PR71, PR75 short directly. Change PC82 to 1U_0805.
15. To avoid ICH3 SM bus leakage,
Page37: Change U21 to FST 3253.
Page12: Change R454, R445 to <3V_S5> from <+3V>.
Page3: Add Q114, Q115, R671, R672, R673.
16. Page44: Delete PFL3, short directly. Delete PD27 and PD24. Change PR72 to 240K, PC95 to 220P, PR80 to 20K_1%, PR74 to 200K.
11
12
1A
43
1A
2A
44
1A
2A
1A
2A
3
3
3B
2001/05/09
13
1A
45
1A
1A
14
1A
1A
2A
2A
2A
2A
46
2A
17. Page42: Delete PAD103, 104, 105.
18. Page15: For LAN, add R674, R675 0_0805.
19. Page28: Add C970, C971 0.1u_0402 at L100.
15
16
47
1A
2A
1A
48
1A
20. Page15: Change R397 to BK2125HM121. Change CON23.15 to GND.
2001/05/10
17
1A
49
1A
21. Page42: Delete PAD13, PAD32, PAD38.
18
19
1A
1A
50
1A
22. Page23: Change the trace width or CRT RGB to 4 mil from 10 mil to approach the recommended impedance 75 ohm.
23. Page15: Add C972, C973 by intel recommendation for LAN.
2001/05/15
51
1A
2A
24. For EMI
Page18: Add C974, L134.
Page24: Add C975, C976.
Page46: Change PL6, PL10 to FBMJ3216HS800-T.
Page47: Add L135 FBMJ3216HS800-T.
Page23: Delete TV_GND, change to GND. Delete R144.
25. To reduce Audio noise,
Page41: Change CON5.182 to AUDGND from GND.
Page26: Change Q62, Q60, C610, C64 to AUDGND.
Page30: Delete C65.
Page22: Delete C399-C403, C53, C464.
Page26,27: Change footprint of CON20,CON19,CON22. Delete R525, R550, R521, R523, R158, R568.
Page25: Delete R314, R313.
20
1A
2A
2001/05/17
21
1A
22
1A
2A
2A
2A
2A
2A
2
2
23
1A
24
25
1A
1A
26
1A
1A
27
26. To Add regulator for VGA PLL power,
Page24: Delete C149, C121, C79. Add U89, C988, C985, C986, C989, C987, C978, C984, C982.
2001/05/18
27. To fix VAUXPCIC leakage under Suspend to Disk,
Page12: Add U87(NC7SZ32), C977, <SUSCLK_ICH>.
28. Page42: For ICT test tool, change HOLE4,20,15,21,16 to NPTH.
2001/05/19
29. Page23: Move C8 from TOP to BOT.
28
1A
29
1A
30
1A
1A
2A
2A
31
30. BOM changes: Page42: PAD109 no loading; Page18: Y1 change part to BG627000106; Page3: Update U24 to rev E; Page23:
Change CON12 to Yellow, and C803,C804,C808,C809,C811,C812 to 82P, and L34-36 to 1.8UH; Page27: Change CON19 to Blue,
CON20 to Pink; Page36: Change CON15 to vendor ACES; Page38: Change CON28 to vendor ACES; Page15: Change U59 from H0022
to H0029 (it's same as the former but lower cost for asia market). Page6: Change U17 to new ver, QC32.
32
1A
1
1
2001/05/24
Project : RT2 MB
MB Assy' P/N: 31RT2MBAB5
Document No.: 204
Rev: 3C
Cover Sheet: 5 of
6
PROJECT : RT2.0
Quanta Computer Inc.
Project Manager : Jacky Lee
Project Leader : T.S. Wan
Drawing by : Allan Yu
Approved by : Jacky Lee
A
B
C
D
E
 A
B
C
D
E
MODEL:
RT2
RT2 MB
REV
DATE
CHANGE LIST
Page From
To
Page
From
To
48. Page35: For interference, change U58 to NC7SZ58.
1
1A
33
1A
2001/04/02
49. Page38: Change R614 to 680 ohm; CON28.1,R614 to be powered by +5V.
2
3
1A
34
1A
2A
50. Page18: For ATI P6 D3 cold, add R659 to interconnect <PCIRST#> and P6. Change R518,Q80,U68,C841 to no-loading.
51. Page47: To interconnect pwrgood of MAX1718 and <HPWG> to EC, add D46, R660.
52. Page18: Change the gate of Q33,Q41 from <5VSUS> to <+5V>.
1A 2A
35
1A
1A
1A
4
4
3A
4
1A
2A
2A
2A
2A
36
2A
53. Page47: Change R299 to no-loading.
5
6
1A
37
54. Page16: For<- HDDRESET>, change U83 to NAND(TC7SH00FU), add DTC144EU,10K to isolate different powers.
2001/04/03
55. For ATI P6 D3 cold, delete <2.5VSUS>,
Page44: Delete <2.5VSUS>, PQ48,PR77, change PQ46 to no load and nets. Add R661,R662(no load). Change the control of U16.11 to <MAINON>
but option to <SUSON> by R662.
Page24: Delete L131,<2.5VSUS>.
56. Page24: Add regulators for DAC powers of CRT & TVout. Add U85,U86,C949-958. Delete L21,L93,C133,C515.
57. Page24, 44 ATI P6 power source options about D3 cold and D3 hot:
38
1A
1A
2A
7
1A
39
1A
8
9
1A
40
1A
41
1A
2A
2A
1A
1A
10
1A
42
Power source option
for ATI P6 power states selection
D3 cold
11
12
1A
43
1A
2A
ATI P6 power
states
D3 hot
44
1A
2A
1A
2A
Control
signals
Location
3
3
MAINON
SUSON
Components options
13
1A
45
1A
1A
14
1A
1A
2A
2A
2A
2A
46
2A
R661
Q110
15
16
47
1A
2A
Load
No load
L133
L130
R659
1A
48
1A
R662
PQ46
L129
17
1A
49
1A
No load
Load
L22
U68 Q80
R518 C841
18
19
1A
1A
50
1A
51
1A
2A
58. To decrease volume of pc beep,
Page26: Change R288 to 6.8K.
Page25: Change R319 to 6.8K.
59. Page47: To fine tune CPU core voltage (VTT), change R89 to 1.82K_1%.
20
1A
2A
2001/04/09
21
1A
22
1A
2A
2A
2A
2A
2A
2
2
23
1A
2001/04/16
60. Page15: To improve Lan performance, change R385 to 110_1% from 100_1%, C757 to 1000P_2KV from 68P_2KV.
24
25
1A
C2 Test (PCB P/N: DA0RT2MBAD1)
1A
1. To fix wrong pins' definitions of ZV port buffer,
Page29: swap net names between U56.3 and U56.9; U56.17 and U56.11.
Page18: Change net name of U47.AA3 to <ZV_PCLK>.
Page25: Change net name of U43.50 to <ZV_SCLK>.
2. For EMI,
Page3: Add R668, R664 0 ohm to connect GND planes.
Page6: Add R665, C960, but reserved.
Page7: Add C961, C962, C965, C966.
Page8: Add R666, C963, but reserved.
Page12: Add R667, C964, but reserved. Change R475 to 22 ohm from 68; C817 to 5P from 15P.
26
1A
1A
27
2001/04/23
28
1A
29
1A
3B
30
1A
1A
2A
2A
31
3. Page44: Change PC96 to 10U/10V/TAN.
4. Page15: Change C757 to 1000P_X7R_4520_3KV for LAN.
5. Page29: Change C723 to 0603 from 0402.
Page30: Change C733 to 0603 to 0402.
32
1A
1
1
2001/04/24
Project : RT2 MB
MB Assy' P/N: 31RT2MBAB5
Document No.: 204
Rev: 3C
Cover Sheet: 4 of
6
PROJECT : RT2.0
Quanta Computer Inc.
Project Manager : Jacky Lee
Project Leader : T.S. Wan
Drawing by : Allan Yu
Approved by : Jacky Lee
A
B
C
D
E
 A
B
C
D
E
MODEL:
RT2
RT2 MB
REV
DATE
CHANGE LIST
Page From
To
Page
From
To
2001/03/15
15. Page47: Delete R644.
1
1A
33
1A
16. Page44: Change PQ48 to SI4800DY for larger current rating.
17. Page16: Change Q102, Q103 to DTC144EU to fix the problem that high level driven by 3.3V is lower than <HDD_VCC>.
2
3
1A
34
1A
2A
2001/03/16
1A 2A
35
1A
1A
1A
4
4
3A
18. Page44: Change PU16 pin20, 21 to 5VPCU.
19. Page47: Change D3 to EC31QS03L.
20. For Intel recommended on GMCH QS stepping,
Page6: Modify C430 and change value to 0.01U
Page3: Add R649 240K at U24.24.
21. Change part 1U_0805 to 1U_0603: C59-62, C521, C463, C545, C462, C533, C564, C559, C625, C624.
22. Page11: Add R658 pull-up for <RC> but reserved.
23. Page7: Change <SM_CLK> layout for Intel design change.
24. Page39: Change U30 power to <+5VA>, add C941 to reduce noise of <BEEP>.
25. For audio noise,
Page26: Change the power to <+5VA> and gnd to <AUDGND> for U12, Q47, C64, R54,R225, R256.
Page41: CON5 pin1,2,61,62,183,65 to <AUDGND> from <GND>.
Page27: Delete R292, R204, R269 and short the nets directly.
Page26: Delete R232.
26. Page41: Change R27 to <AUDGND> from <GND>, CON5 pin243, 244 to <GND> from <CHASIS_DOCK_1>(chasis gnd).
4
1A
2A
2A
2A
2A
36
2A
2001/03/22
5
6
1A
37
38
1A
1A
2A
7
1A
39
1A
8
9
1A
40
1A
41
1A
2A
2A
1A
1A
10
1A
42
11
12
1A
43
1A
2A
44
1A
2A
1A
2A
3
3
13
1A
45
1A
1A
27. To prevent <HDD_VCC> and <CD_VCC> from power down during <PCIRST#> acting in warm-boot,
Page12: Delete the GPIO41, GPIO42 at U67(ICH3) pin G21, D23. Add <HDDVCC_EN> at pin W4(GPIO27), <CDVCC_EN> at pin Y3(GPIO28).
Page16: Add <HDDVCC_EN>, R653, R654(reserved), and <HDDVCC_ON> from EC. Change Q106 to 2N7002E.
Page17: Add <CDVCC_EN>, R655, R656(reserved), and <CDVCC_ON> from EC.
Page35: Add <HDDVCC_ON>,<CDVCC_ON> at U82 pin2, 5, controlled by EC (reserved).
14
1A
1A
2A
2A
2A
2A
46
2A
15
16
47
1A
2A
1A
48
1A
28. Page12: Add R652 pull-low <PWROK>.
29. For RTC leakage, implement the design changes from Intel(WW08),
Page12: Add R652 pull-low <PWROK>. Add U84, C948, R651.
The rest changes have been done.
30. Page12: Move the RTC short pad G2 near CON29 under ninipci door.
31. Page16: For <-HDRESET>, Add U83, C942; delete Q102,103105, R630, R632.
32. Page16: Add C943. Change R629 to 1M.
33. Page17: Change R143 to 1M.
34. Page11: Add R657 10K at <APICD1>. Change R510 to 10K.
35. Page12 Change R547 to 22.6_1% for uab bias.
36. Page 24: For ATI P6 D3 cold, Change L131,L129,L22 to no-loading; L132,L130,L133 to loading.
37. For EC to control RF ON or OFF,
Page38: Add Q112, <RF_ON_OFF>.
Page35: Add <RF_ON_OFF> at U78.19.
38. Page36: For FAN driving current, change R458 to 1K; D41to loading; C895 to 4700P for <FANSIG>.
39. To prevent interference from wireless card,
Page30: Change C590,711,748 to 1U_0603.
Page25: Change C552 to 1U_0603.
Page28: Change C684 to 1U_0603.
40. Page46: To save power, change PR49,50,12,13 from 100K to 1M.
41. Page42: Add EMI Spring: PAD100-109.
42. Page5: Add C944-C947 for VTT.
43. For interference, move Q56,R380 away from CON29.
44. Page34: For interference, change C844 to 1U-0603.
45. Page33: Add IRGND plane under the ir module.
2001/03/29
46. Page36: Move R458, Q73 to top side.
47. For impedance control, Change USB diffrrencial pairs to 7.5/7.5 mil (width/space).
17
1A
49
1A
18
19
1A
1A
50
1A
51
1A
2A
20
1A
2A
21
1A
22
1A
2A
2A
2A
2A
2A
2
2
2001/03/28
23
1A
24
25
1A
1A
26
1A
1A
27
28
1A
29
1A
30
1A
1A
2A
2A
31
32
1A
1
1
Project : RT2 MB
MB Assy' P/N: 31RT2MBAB5
Document No.: 204
Rev: 3C
Cover Sheet: 3 of
6
PROJECT : RT2.0
Quanta Computer Inc.
Project Manager : Jacky Lee
Project Leader : T.S. Wan
Drawing by : Allan Yu
Approved by : Jacky Lee
A
B
C
D
E
 A
B
C
D
E
MODEL:
RT2 MB 16M
RT2 MB 16M
REV
DATE
CHANGE LIST
Page From
To
Page
From
To
B Test (PCB P/N: DA0RT2MBAB5)
1
1A
33
1A
40. Page46: For power on squence, change PC36, PC38 to 1000P.
41. Page4: Change R108 to 0603 size.
42. Page24,44: Change C149, C167, C171, C793 foot print to TC1206
43. Page38: Change R362 to 10K.
44. Page43: Change R516, R520 to no-loading for ITP.
45. Page25, 12, 15: ChangeY3 to Epson SG-710ECK, Y6 to MC-306, add 2nd source BG625000508.
2
3
1A
34
1A
2A
1A 2A
35
1A
1A
1A
4
4
2001/02/26
4
1A
2A
2A
2A
2A
36
2A
5
6
1A
37
38
1A
1A
2A
46. Page12: Add L122 on <VCCRTC> for EMI.
7
1A
39
1A
47. Page46: Change R300 to 0603 size.
48. Page3: For EMI, add C900-C905(10P, reserved) and place near the destinations.
49. Page5: Add bypass cap 0.1U_0402 on VTT (C906-C926) and VCCT(C927-C936).
50. Page24: Modify power circuit for <VGA_PLL1.8>,<VGA_PNLPLL1.8>.
51. Page3: For EMI, modify GND of CLK generator. Add <CLK_GND>, R642, R643.
52. Page30, 35: Change the control of <-RF_ON_LED>, R633 from miniPCI to EC.
53. Page23, 38: To save power, change power plane from <5VPCU> to <+5V> on U39.8, R176, R3; from <3VSUS> to <3.3VAUX> on R369, R362.
54. Page47: Change Q6, Q12 to IRF7811A; Q5, Q10, Q11 to FDS7764A because of better characteristics.
8
9
1A
40
1A
2A
41
1A
2A
2A
1A
1A
2001/02/27
10
1A
42
11
12
1A
43
1A
2A
44
1A
2A
1A
2A
3
3
55. Page20: Change L23 to no-loading, L24 to loading for Hyundai DDR. And change part to FCM2012V131DC10 for larger current rating.
13
1A
45
1A
1A
2001/03/02
56. Page36: Change R628 from 180K to 100K for part available.
14
1A
1A
2A
2A
2A
2A
46
2A
57. Page12: For RTC leakage, change R455 to 22K at U67.Y6 ( INTRUDER# ).
15
16
47
1A
2A
2001/03/06
1A
48
1A
C1 Test (PCB P/N: DA0RT2MBAC3)
2001/03/07
1. Page22: Change R210 from 22_1206 to 22R_0805.
17
1A
49
1A
18
19
1A
1A
50
1A
2. Modify 3V power circuits to simplify 3V resources and components. Delete <3V_ALWAYS> in entire schematics because it doesn't need
ALWAYS 3V.
Page49: Change PU15.28 from <VL> to <RVCC_ON>, change <3V_ALWAYS> to <3V_S5>.Change parts of PL4, PR63. Delete PC36, PC47. NC PD19.
51
1A
2A
20
1A
2A
3. Page21: Change memory I/O power of VGA chip, VDDR1, from <VDD_SDRAM> to <VDDQ_2.5V>. Because it must be same as VDDQ of VGA SDRAM(U23,
U60). Change VDDRH(U47.C5) to <VDDQ_2.5V> thru L123.
2001/03/08
21
1A
4. Page44, 46: Change net name from <MAINON_0> to <-MAIN_ON>, from <SUSON_0> to <-SUS_ON>.
5. Page47: Add L127, R644 but reserved for second source.
6. Page13: Change R432 from 0805 to 0603.
7. Page46: Delete fuse L33, L44. Change PL6 to FBM3216HS480NT(6 Amp) and add PL10 the same part.
22
1A
2A
2A
2A
2A
2A
2
2
23
1A
3A
24
25
1A
8. Page 44: Modify 1.8 and 2.5 voltage circuits to switching power circuits for efficiency, change the source of <+1.5V> to be from
<+1.8V>.
9. As the changes of item 8, modify the VGA power circuits,
Page24: Delete regulators circuits: PU1, R98, R99 for <+1.8_VGA>; Q21, Q72, PU11, C285, C787-788, R447 for <VDDQ_2.5V>; U20, C173, C146,
R337-338 for <VGA_MEMPLL1.8>, and the relative discharging circuits. Then power them thru beads.
10. Page25, 35: Change <-M3_RST_EN> to <M3_RST_EN> for high-active.
11. Page47: Add discharge circuits for <VCCT>: R647, Q109; <VTT>: R645-646, Q107-108.
1A
26
1A
1A
2001/03/12
27
28
1A
12. Page6: Change R324 footprint from 0603 to 0805.
29
1A
2001/03/13
13. Page17: Change Q78 from SI4800DY to SI3456 for small size.
30
1A
1A
2A
2A
14. For VGA D3-cold,
Page44: Add <+2.5V> power, PQ48, Q110, R648.
Page24: Add <2.5_VGA>, L131(reserved), L132 for option of power.
Page20: Change L24 to be powered with <2.5_VGA>.
Page24: Add <1.8_VGA>, L129(reserved), L130 for option of power.
Page24: Add L133( reserve L22 ) for option of power between <3VSUS> and <+3V>.
31
2001/03/15
32
1A
1
1
Project : RT2 MB 16M
MB Assy' P/N: 31RT2MB0019
Document No.: 204
Rev: 3C
Cover Sheet: 2 of 6
PROJECT : RT2.0
Quanta Computer Inc.
Project Manager : Jacky Lee
Project Leader : T.S. Wan
Drawing by : Allan Yu
Approved by : Jacky Lee
A
B
C
D
E
  [ Pobierz całość w formacie PDF ]

zanotowane.pl

doc.pisz.pl

pdf.pisz.pl

chiara76.opx.pl