HY 5118160

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HY 5118160 , Elektronika, Datascheets

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1M
16-Bit Dynamic RAM
1k Refresh
(Fast Page Mode)
´
HYB 5118160BSJ-50/-60
HYB 3118160BSJ-50/-60
Advanced Information

1 048 576 words by 16-bit organization

0 to 70
°
C operating temperature

Fast Page Mode operation

Performance:
-50
-60
t
RAC
RAS access time
50
60
ns
t
CAC
CAS access time
13
15
ns
t
AA
Access time from address
25
30
ns
t
RC
Read/Write cycle time
84
104
ns
t
PC
Fast page mode cycle time
35
40
ns

Power Dissipation, Refresh & Addressing:
HYB5118160
HYB3118160
-50
-60
-50
-60
Power Supply
5 V
10 %
3.3 V
0.3 V
±
±
Addressing
10/10
10/10
Refresh
1024 cycles / 16 ms
Active
715
632
468
414
mW
TTL Standby
11
7.2
mW
CMOS Standby
5.5
3.6
mW

Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh and hidden refresh

All inputs, outputs and clocks fully TTL (5 V versions) and LV-TTL (3.3 V version)-compatible

Plastic Package:
P-SOJ-42-1
400 mil
Semiconductor Group
1
1998-10-01
 HYB 5118160BSJ-50/-60
HYB 3118160BSJ-50/-60
1M
16 DRAM
´
The HYB 5(3)118160 are 16 MBit dynamic RAMs based on die revisions “G” & “F” and organized
as 1 048 576 words by 16-bits. The HYB 5(3)118)160 utilizes a submicron CMOS silicon gate
process technology, as well as advanced circuit techniques to provide wide operating margins, both
internally and for the system user. Multiplexed address inputs permit the HYB 5(3)118160 to be
packaged in a standard SOJ-42 plastic package with 400 mil width. This package provide high
system bit densities and is compatible with commonly used automatic testing and insertion
equipment.
Ordering Information
Type
Ordering Code
Package
Descriptions
HYB 5118160BSJ-50
Q67100-Q1072
P-SOJ-42-1 400 mil
5 V
50 ns FPM-DRAM
HYB 5118160BSJ-60
Q67100-Q1073
P-SOJ-42-1 400 mil
5 V
60 ns FPM-DRAM
HYB 3118160BSJ-50
on request
P-SOJ-42-1 400 mil
3.3 V 50 ns FPM-DRAM
HYB 3118160BSJ-60
on request
P-SOJ-42-1 400 mil
3.3 V 60 ns FPM-DRAM
Pin Names
HYB 5(3)118160
Row Address Inputs
A0 - A9
Column Address Inputs
A0 - A9
Row Address Strobe
RAS
Upper Column Address Strobe
UCAS
Lower Column Address Strobe
LCAS
Output Enable
OE
Data Input/Output
I/O1 - I/O16
Read/Write Input
WE
V
CC
Power Supply
V
SS
Ground (0 V)
Not Connected
N.C.
Semiconductor Group
2
1998-10-01
 HYB 5118160BSJ-50/-60
HYB 3118160BSJ-50/-60
1M
16 DRAM
´
P-SOJ-42 (400 mil)
V
CC
V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
42
41
40
SS
I/O1
I/O2
I/O16
I/O15
I/O3
I/O4
39
I/O14
38
I/O13
V
CC
V
SS
37
I/O5
I/O6
I/O7
36
I/O12
35
I/O11
34
I/O10
I/O8
33
I/O9
N.C.
32
N.C.
N.C.
31
LCAS
WE
RAS
N.C.
N.C.
30
UCAS
29
OE
28
A9
27
A8
A0
A1
A2
26
A7
18
25
A6
19
20
24
A5
A3
23
A4
V
V
21
22
CC
SS
SPP02812
Pin Configuration
Semiconductor Group
3
1998-10-01
 HYB 5118160BSJ-50/-60
HYB 3118160BSJ-50/-60
1M
16 DRAM
´
...
I/O1
I/O2
I/O16
...
Data In
Buffer
Data Out
Buffer
OE
16
WE
&
16
UCAS
LCAS
No.2 Clock
Generator
Column
Address
Buffers (10)
10
10
Column
Decoder
A0
A1
Refresh
Controller
A2
16
A3
Sense Amplifier
I/O Gating
A4
A5
Refresh
Counter (10)
A6
1024
16
x
A7
A8
10
A9
.
Row
10
10
Row
Memory Array
Address
1024
1024 x 1024 x
16
Decoder
.
Buffers (10)
No.1 Clock
Generator
RAS
V
CC
Voltage Down
Generator
V
(internal)
CC
SPB02826
Block Diagram for HYB 5118160BSJ
Semiconductor Group
4
1998-10-01
 HYB 5118160BSJ-50/-60
HYB 3118160BSJ-50/-60
1M
16 DRAM
´
Absolute Maximum Ratings
Operating temperature range ........................................................................................... 0 to 70
C
Storage temperature range........................................................................................ – 55 to 150
°
C
Input/output voltage (5 V versions) .................................................... – 0.5 to min (
V
CC
+ 0.5, 7.0) V
Input/output voltage (3.3 V versions) ................................................. – 0.5 to min (
V
CC
+ 0.5, 4.6) V
Power supply voltage (5 V versions) ....................................................................... – 1.0 V to 7.0 V
Power supply voltage (3.3 V versions) .................................................................... – 1.0 V to 4.6 V
Power dissipation (5 V versions) ............................................................................................. 1.0 W
Power dissipation (3.3 V versions) .......................................................................................... 0.5 W
Data out current (short circuit) ................................................................................................ 50 mA
Note: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent
damage of the device. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
°
DC Characteristics
T
A
= 0 to 70
°
C,
V
SS
= 0 V,
t
T
= 2 ns
Parameter
Symbol
Limit Values
Unit
Test
Condition
min.
max.
5 V Versions
Power supply voltage
V
CC
4.5
5.5
V
V
IH
V
CC
+ 0.5 V
1
Input high voltage
2.4
V
IL
1
Input low voltage
– 0.5
0.8
V
Output high voltage (
I
OUT
= – 5 mA)
V
OH
1
2.4

V
Output low voltage (
I
OUT
= 4.2 mA)
V
OL
1

0.4
V
3.3 V Versions
Power supply voltage
V
CC
3.0
3.6
V
V
IH
V
CC
+ 0.5 V
1
Input high voltage
2.0
V
IL
1
Input low voltage
– 0.5
0.8
V
TTL Output high voltage (
I
OUT
= – 2 mA)
V
OH
1
2.4

V
TTL Output low voltage (
I
OUT
= 2 mA)
V
OL
1

0.4
V
CMOS Output high voltage (
I
OUT
= – 100
m
A)
V
OH
V
CC
– 0.2

V
CMOS Output low voltage (
I
OUT
= 100
m
A)
V
OL

0.2
V
Semiconductor Group
5
1998-10-01
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