HT16512 (Holtek), display drivers
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HT16512
1/4 to 1/11 Duty VFD Controller
Features
4-bit general purpose input port
High-voltage output: V
DD
35V max
.
No external resistors necessary for driver output
(provides PMOS open-drain and pull-low resistor
output)
Multiple display (11-segment & 11-digit to 16-segment
& 6-digit)
Serial interface with MCU (CLK, CS, DI, DO)
6
4 matrix key scanning
44-pin QFP package
8 steps dimmer circuit
4 LED output ports
Applications
Other similar application panel function control
Industrial measuring instrument panel function control
General Description
HT16512 is a VFD (Vacuum Fluorescent Display) con-
troller/driver that is driven on a 1/4 to 1/11 duty factor. It
consists of 11 segment output lines, 6 grid output lines, 5
segment/grid output drive lines, 4 LED output ports, a
control circuit, a display memory, and a key scan circuit.
Serial data inputs to the HT16512 through a three-line
serial interface. This VFD controller/driver is ideal as a
peripheral device for an MCU.
Block Diagram
Rev. 1.40
1
May 3, 2005
Logic voltage: 5V
Consumer products panel function control
HT16512
Pin Assignment
Pin Description
Pin No.
Pin Name
I/O
Description
1~4
SW0~SW3
I
4-bit general purpose input port
Whether these pins are used or not, they should be connected to VDD
or VSS.
5
DO
O
Output serial data at the falling edge of the shift clock, starting from low
order bit. This is an NMOS open-drain output pin.
6
DI
I
Input serial data at the rising edge of the shift clock, starting from the
low order bit.
7, 43
VSS
Negative power supply, ground
Both of the VSS (pin 7 and pin 43) should be connected to ground.
8
CLK
I
Reads serial data at the rising edge, and outputs data at the falling
edge.
9
CS
I
Initializes serial interface at the rising or falling edge
of th
e HT16512.
Then it waits to receive a command. Data input after CS has fallen is
processed as a command. While command data is processed, curr
ent
processing is stopped, and the serial interface is initialized. While CS
is high, CLK is ignored.
10~13
K0~K3
I
Keying data input to these pins is latched at the end of the display cy-
cle.
14, 38
VDD
Posistive power supply
15~20
S0/K0~S5/K5
O
Segment or key source output pins (dual function). This is PMOS
open-drain and pull-low resistor output.
21~25
S6~S10
O
Segment driver output pins (segment only). This is PMOS open-drain
and pull-low resistor output.
26, 28~31
S11/G10~S15/G6
O
Segment or Grid driver output pins. These pins are selectable for seg-
ment or grid driving. This is PMOS open-drain and pull-low resistor
output.
27
VEE
VFD power supply
37~32
G0~G5
O
Grid driver output pins (Grid only). This is PMOS open-drain and
pull-low resistor output.
42~39
LED0~LED3
O
LED driver output ports. This is a CMOS output pin.
44
OSC
I
Connected to an external resistor or an RC oscillator circuit.
Rev. 1.40
2
May 3, 2005
HT16512
Approximate Internal Connections
Absolute Maximum Ratings
Supply Voltage ...........................V
SS
0.3V to V
SS
+5.5V
Operating Temperature...........................
25
Cto75
C
Input Voltage..............................V
SS
0.3V to V
DD
+0.3V
Storage Temperature ............................
50
Cto125
C
Note: These are stress ratings only. Stresses exceeding the range specified under
may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
Absolute Maximum Ratings
D.C. Characteristics
Ta=25
C
Test Conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
DD
Conditions
V
DD
Logic Supply Voltage
4.5
5
5.5
V
V
EE
VFD Supply Voltage
0
V
DD
35
V
f
OSC
Oscillation Frequency
5V R
OSC
=51k
350
500
650
kHz
R
PL
Output Pull-low Resistor
5V Driver output
50
100
150
k
I
DD
Operating Current
5V No load, VFD display off
5
A
I
OL
Driver Leakage Current
5V
V
O
=V
DD
35V, VFD driver
10
A
off
I
OL1
LED Sink Current
5V
V
OL
=1V, LED0~LED3
20
mA
I
OH1
LED Source Current
5V
V
OH
=0.9V
DD
LED0~LED3
1
mA
I
OH21
Segment/Key Source Current
5V
2V
S0/K0~S5/K5, S6~S10
3
mA
I
OH22
Segment/Grid Source Current
5V
2V
G0~G5, S11/G10~S15/G6
15
mA
I
OL3
DO Sink Current
5V V
OL
=0.4V
4
mA
V
IH
H
Input Voltage
0.7V
DD
V
DD
V
V
IL
L
Input Voltage
0
0.3V
DD
V
V
OH1
High-level Output Voltage
5V
LED0~LED3, I
OH1
=
1mA
0.9V
DD
V
DD
V
V
OL1
Low-level Output Voltage
5V LED0~LED3, I
OL1
=20mA
0
1
V
V
OL2
Low-level Output Voltage
5V DO, I
OL2
=4mA
0
0.4
V
Rev. 1.40
3
May 3, 2005
V
OH
=V
DD
V
OH
=V
DD
HT16512
A.C. Characteristics
Ta=25
C
Test Conditions
Symbol
Parameter
Min. Typ. Max. Unit
V
DD
Conditions
t
PHL
Propagation Delay Time
5V
CLK
DO
C
L
=15pF, R
L
=10k
100
ns
t
PLH
5V
300
ns
t
r1
5V
C
L
=300pF, S0~S10
2
s
t
r2
Rise Time
5V
C
L
=300pF, G0~G5,
S11/G10~S15/G6
0.5
s
t
f
Fall Time
5V C
L
=300pF, Sn, Gn
120
s
t
max
Maximum Clock Frequency
5V Duty=50%
1
MHz
C
i
Input Capacitance
5V
15
pF
t
CW
Clock Pulse Width
5V
400
ns
t
SW
Strobe Pulse Width
5V
1
us
t
SU
Data Setup Time
5V
100
ns
t
h
Data Hold Time
5V
100
ns
t
CS
Clock-Strobe Time
5V CLK rising edge to CS rising edge
1
s
t
W
Wait Time
5V CLK rising edge to CLK falling edge
1
s
Functional Description
8 bits and
stores the data transmitted from an external device to
the HT16512 through a serial interface. The contents of
the RAM are directly mapped to the contents of the VFD
driver. Data in the RAM can be accessed through the
data setting, address setting and display control com-
mands. It is assigned addresses in 8-bit unit as follows:
The 16 uniform sections available form 8 steps dimmer
via 3-bit binary code. The 8-step dimmer includes 1/16,
2/16, 4/16, 10/16, 11/16, 12/16, 13/16 and 14/16. The
1/16 pulse width indicates minimum lightness. The
14/16 pulse width represents maximum lightness. (Re-
fer to the display control command).
Key Matrix and Key-Input Data Storage RAM
The key matrix scans the series key states at each level
of the key strobe signal (S0/K0~S5/K5) output of the
HT16512. The key strobe signal outputs are
time-multiplexed signals from S0/K0~S5/K5. The states
of inputs K0~K3 are sampled by strobe signal
S0/K0~S5/K5 and latched into the register.
The key matrix is made up of a 6
4 matrix, as shown be-
low.
Dimming Control
HT16512 provides 8-step dimmer function on display by
controlling the 3-bit binary command code. The full
pulse width of grid signal is divides into 16 uniform sec-
tions by PWM (pulse width modulation) technology.
Rev. 1.40
4
May 3, 2005
Display RAM and Display Mode
The static display RAM is organized into 22
HT16512
The data of each key is stored as illustrated below, and
is read with the read command, starting from the least
significant bit.
Display mode setting commands
These commands initialize the HT16512 and select
the number of segments and the number of grids
(1/4~1/11 duty, 11 segments to 16 segments).
When these commands are executed, the display is
forcibly turned off, and key scanning is also stopped.
To resume display, the display command
must
be executed. If the same mode is selected, nothing
happens.
ON
s least significant bit. In our
application (see application circuits), the user adopts an
internal NMOS device to a driver LED component by
connecting VDD. When a bit of this port is 0, the corre-
sponding LED lights; when the bit is 1, the LED turns off.
The data of bits 5 through 8 are ignored.
Data setting commands
These commands set the data write and data read
modes.
SW Data
HT16512 provides an extra 4-bit general input port. The
SW data is provided with available binary code. The SW
data is read with the read command, starting from the
least significant bit. Bits 5 through 8 of the SW data are
0.
Address setting commands
These commands set the address of the display mem-
ory.
If address 16H or higher is set, data is ignored until a
valid address is set.
Commands
Commands set the display mode and status of the VFD
driver.
The first
1 b
yte input to the HT16512 through the DI pin
afte
r the CS pin has fallen, is regarded as a command. If
CS is set high while commands/data are transmitted,
serial communication is initialized, and the com-
mands/data being transmitted are not valid (however,
the commands/data previously transmitted remains
valid).
Display control commands
Rev. 1.40
5
May 3, 2005
LED Port
The LED port belongs to the CMOS output configura-
tion.
Data is written to the LED port with the write command,
starting from the least port
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HT16512
1/4 to 1/11 Duty VFD Controller
Features
4-bit general purpose input port
High-voltage output: V
DD
35V max
.
No external resistors necessary for driver output
(provides PMOS open-drain and pull-low resistor
output)
Multiple display (11-segment & 11-digit to 16-segment
& 6-digit)
Serial interface with MCU (CLK, CS, DI, DO)
6
4 matrix key scanning
44-pin QFP package
8 steps dimmer circuit
4 LED output ports
Applications
Other similar application panel function control
Industrial measuring instrument panel function control
General Description
HT16512 is a VFD (Vacuum Fluorescent Display) con-
troller/driver that is driven on a 1/4 to 1/11 duty factor. It
consists of 11 segment output lines, 6 grid output lines, 5
segment/grid output drive lines, 4 LED output ports, a
control circuit, a display memory, and a key scan circuit.
Serial data inputs to the HT16512 through a three-line
serial interface. This VFD controller/driver is ideal as a
peripheral device for an MCU.
Block Diagram
Rev. 1.40
1
May 3, 2005
Logic voltage: 5V
Consumer products panel function control
HT16512
Pin Assignment
Pin Description
Pin No.
Pin Name
I/O
Description
1~4
SW0~SW3
I
4-bit general purpose input port
Whether these pins are used or not, they should be connected to VDD
or VSS.
5
DO
O
Output serial data at the falling edge of the shift clock, starting from low
order bit. This is an NMOS open-drain output pin.
6
DI
I
Input serial data at the rising edge of the shift clock, starting from the
low order bit.
7, 43
VSS
Negative power supply, ground
Both of the VSS (pin 7 and pin 43) should be connected to ground.
8
CLK
I
Reads serial data at the rising edge, and outputs data at the falling
edge.
9
CS
I
Initializes serial interface at the rising or falling edge
of th
e HT16512.
Then it waits to receive a command. Data input after CS has fallen is
processed as a command. While command data is processed, curr
ent
processing is stopped, and the serial interface is initialized. While CS
is high, CLK is ignored.
10~13
K0~K3
I
Keying data input to these pins is latched at the end of the display cy-
cle.
14, 38
VDD
Posistive power supply
15~20
S0/K0~S5/K5
O
Segment or key source output pins (dual function). This is PMOS
open-drain and pull-low resistor output.
21~25
S6~S10
O
Segment driver output pins (segment only). This is PMOS open-drain
and pull-low resistor output.
26, 28~31
S11/G10~S15/G6
O
Segment or Grid driver output pins. These pins are selectable for seg-
ment or grid driving. This is PMOS open-drain and pull-low resistor
output.
27
VEE
VFD power supply
37~32
G0~G5
O
Grid driver output pins (Grid only). This is PMOS open-drain and
pull-low resistor output.
42~39
LED0~LED3
O
LED driver output ports. This is a CMOS output pin.
44
OSC
I
Connected to an external resistor or an RC oscillator circuit.
Rev. 1.40
2
May 3, 2005
HT16512
Approximate Internal Connections
Absolute Maximum Ratings
Supply Voltage ...........................V
SS
0.3V to V
SS
+5.5V
Operating Temperature...........................
25
Cto75
C
Input Voltage..............................V
SS
0.3V to V
DD
+0.3V
Storage Temperature ............................
50
Cto125
C
Note: These are stress ratings only. Stresses exceeding the range specified under
may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
Absolute Maximum Ratings
D.C. Characteristics
Ta=25
C
Test Conditions
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
DD
Conditions
V
DD
Logic Supply Voltage
4.5
5
5.5
V
V
EE
VFD Supply Voltage
0
V
DD
35
V
f
OSC
Oscillation Frequency
5V R
OSC
=51k
350
500
650
kHz
R
PL
Output Pull-low Resistor
5V Driver output
50
100
150
k
I
DD
Operating Current
5V No load, VFD display off
5
A
I
OL
Driver Leakage Current
5V
V
O
=V
DD
35V, VFD driver
10
A
off
I
OL1
LED Sink Current
5V
V
OL
=1V, LED0~LED3
20
mA
I
OH1
LED Source Current
5V
V
OH
=0.9V
DD
LED0~LED3
1
mA
I
OH21
Segment/Key Source Current
5V
2V
S0/K0~S5/K5, S6~S10
3
mA
I
OH22
Segment/Grid Source Current
5V
2V
G0~G5, S11/G10~S15/G6
15
mA
I
OL3
DO Sink Current
5V V
OL
=0.4V
4
mA
V
IH
H
Input Voltage
0.7V
DD
V
DD
V
V
IL
L
Input Voltage
0
0.3V
DD
V
V
OH1
High-level Output Voltage
5V
LED0~LED3, I
OH1
=
1mA
0.9V
DD
V
DD
V
V
OL1
Low-level Output Voltage
5V LED0~LED3, I
OL1
=20mA
0
1
V
V
OL2
Low-level Output Voltage
5V DO, I
OL2
=4mA
0
0.4
V
Rev. 1.40
3
May 3, 2005
V
OH
=V
DD
V
OH
=V
DD
HT16512
A.C. Characteristics
Ta=25
C
Test Conditions
Symbol
Parameter
Min. Typ. Max. Unit
V
DD
Conditions
t
PHL
Propagation Delay Time
5V
CLK
DO
C
L
=15pF, R
L
=10k
100
ns
t
PLH
5V
300
ns
t
r1
5V
C
L
=300pF, S0~S10
2
s
t
r2
Rise Time
5V
C
L
=300pF, G0~G5,
S11/G10~S15/G6
0.5
s
t
f
Fall Time
5V C
L
=300pF, Sn, Gn
120
s
t
max
Maximum Clock Frequency
5V Duty=50%
1
MHz
C
i
Input Capacitance
5V
15
pF
t
CW
Clock Pulse Width
5V
400
ns
t
SW
Strobe Pulse Width
5V
1
us
t
SU
Data Setup Time
5V
100
ns
t
h
Data Hold Time
5V
100
ns
t
CS
Clock-Strobe Time
5V CLK rising edge to CS rising edge
1
s
t
W
Wait Time
5V CLK rising edge to CLK falling edge
1
s
Functional Description
8 bits and
stores the data transmitted from an external device to
the HT16512 through a serial interface. The contents of
the RAM are directly mapped to the contents of the VFD
driver. Data in the RAM can be accessed through the
data setting, address setting and display control com-
mands. It is assigned addresses in 8-bit unit as follows:
The 16 uniform sections available form 8 steps dimmer
via 3-bit binary code. The 8-step dimmer includes 1/16,
2/16, 4/16, 10/16, 11/16, 12/16, 13/16 and 14/16. The
1/16 pulse width indicates minimum lightness. The
14/16 pulse width represents maximum lightness. (Re-
fer to the display control command).
Key Matrix and Key-Input Data Storage RAM
The key matrix scans the series key states at each level
of the key strobe signal (S0/K0~S5/K5) output of the
HT16512. The key strobe signal outputs are
time-multiplexed signals from S0/K0~S5/K5. The states
of inputs K0~K3 are sampled by strobe signal
S0/K0~S5/K5 and latched into the register.
The key matrix is made up of a 6
4 matrix, as shown be-
low.
Dimming Control
HT16512 provides 8-step dimmer function on display by
controlling the 3-bit binary command code. The full
pulse width of grid signal is divides into 16 uniform sec-
tions by PWM (pulse width modulation) technology.
Rev. 1.40
4
May 3, 2005
Display RAM and Display Mode
The static display RAM is organized into 22
HT16512
The data of each key is stored as illustrated below, and
is read with the read command, starting from the least
significant bit.
Display mode setting commands
These commands initialize the HT16512 and select
the number of segments and the number of grids
(1/4~1/11 duty, 11 segments to 16 segments).
When these commands are executed, the display is
forcibly turned off, and key scanning is also stopped.
To resume display, the display command
must
be executed. If the same mode is selected, nothing
happens.
ON
s least significant bit. In our
application (see application circuits), the user adopts an
internal NMOS device to a driver LED component by
connecting VDD. When a bit of this port is 0, the corre-
sponding LED lights; when the bit is 1, the LED turns off.
The data of bits 5 through 8 are ignored.
Data setting commands
These commands set the data write and data read
modes.
SW Data
HT16512 provides an extra 4-bit general input port. The
SW data is provided with available binary code. The SW
data is read with the read command, starting from the
least significant bit. Bits 5 through 8 of the SW data are
0.
Address setting commands
These commands set the address of the display mem-
ory.
If address 16H or higher is set, data is ignored until a
valid address is set.
Commands
Commands set the display mode and status of the VFD
driver.
The first
1 b
yte input to the HT16512 through the DI pin
afte
r the CS pin has fallen, is regarded as a command. If
CS is set high while commands/data are transmitted,
serial communication is initialized, and the com-
mands/data being transmitted are not valid (however,
the commands/data previously transmitted remains
valid).
Display control commands
Rev. 1.40
5
May 3, 2005
LED Port
The LED port belongs to the CMOS output configura-
tion.
Data is written to the LED port with the write command,
starting from the least port
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